IET Parallel Computing Everywhere
Do Many Cores Make Light Work?

IET Cambridge Network Seminar 2007

Thursday 6th December 2007
9:00 to 17:10

Cambridge University Computer Laboratory
J J Thompson Avenue
Madingley Road
Cambridge

This event was organised by members of
the IET Cambridge Network Committee

For details on previous year's seminars please browse The Archive

Contents

Introduction

Parallel computing ideas have been around for decades, but very recently we have seen massive adoption of chip multiprocessors from your MP3 player to your laptop and desktop. But is this a fad or a technology push that is unstoppable? Will the technology mean that we will have 100s of processors in our desktop in 10 years time? How will the industry write large numbers of robust applications for them? Will we be able to use all of the processors all of the time, or will thermal limits prohibit this? Will we fail deliver ever more performance for less cost, resulting in the industry stagnating, or can the battles be won? This one day seminar invited some of the technology leaders in the UK to answer these and other questions.

 
Programme

Time Title Speaker
09:00 Registration
09:30 Welcome and Introduction Chairman
IET Cambridge Network Committee
09:40 Keynote Address:
Biology Knows Best - Lessons from Nature on Power-Efficient Parallelism
Steve Furber
University of Manchester
10:30 Coffee
Session 1 - Reconfigurable or Reprogrammable Parallelism?
11:00 Gregor Nixon
Altera
11:40 David May
XMOS / University of Bristol
12:20 Simon Knowles
Icera
13:00 Buffet Lunch
Session 2 - Parallelism in Practice
14:00 Monty Barlow
Cambridge Consultants Ltd
14:40 Ray McConnell
Clearspeed
15:20 Tea
Session 3 - Parallel Computing in your Pocket
15:50 Nigel Topham
ARC / University of Edinburgh
16:30 John Goodacre
ARM
17:10 Close of Seminar  
     

Speaker Profiles

Steve Furber

ICL Professor of Computer Engineering School of Computer Science, University of Manchester

Steve Furber is the ICL Professor of Computer Engineering in the School of Computer Science at the University of Manchester. He received his B.A. degree in Mathematics in 1974 and his Ph.D. in Aerodynamics in 1980 from the University of Cambridge, England. From 1980 to 1990 he worked in the hardware development group within the R&D department at Acorn Computers Ltd, and was a principal designer of the BBC Microcomputer and the ARM 32-bit RISC microprocessor, both of which earned Acorn Computers a Queen's Award for Technology. Upon moving to the University of Manchester in 1990 he established the Amulet research group which has interests in asynchronous logic design and power-efficient computing, and which merged with the Parallel Architectures and Languages group in 2000 to form the Advanced Processor Technologies group. Steve is a Fellow of the Royal Society, the Royal Academy of Engineering, the British Computer Society, the Institution of Engineering and Technology and the IEEE, and a Chartered Engineer. In 2003 he was awarded a Royal Academy of Engineering Silver Medal for "an outstanding and demonstrated personal contribution to British engineering, which has led to market exploitation". In 2004 he became the holder of a Royal Society Wolfson Research Merit Award . In 2007 he was awarded the IET Faraday Medal, "...the most prestigious of the IET Achievement Medals."


Gregor Nixon

Altera

Gregor Nixon is responsible for DSP EDA Tool Research and Development at Altera. He is a driver of key research and development projects within Altera and his responsibilities include the development of company DSP strategy from an engineering perspective. During his 8 years with Altera he has been involved in many different areas of Altera's business including the development of placement and routing algorithms for various device families. He received his B.Sc. (Hons) in Physics from the University of Glasgow and a Ph.D. in Semiconductor Quantum Optics from the University of Cambridge.


David May

University of Bristol http://www.cs.bris.ac.uk/~dave/

David May is Professor and Head of Computer Science at Bristol University. Before joining the university in 1995, he worked for 16 years in the microelecronics industry, joining Inmos (now STMicroelectronics) at its formation in 1979. He is well known for his work on innovative microprocessors including the Inmos transputer. He is the author of over 100 papers and patents, and has given numerous conference presentations.

In 1990 he was elected a Fellow of the Royal Society for his contributions to computer architecture and parallel computing. David's current research interests are in microprocessor architecture; system design and verification; mobile, wearable and pervasive computing. He maintains active relationships with industry and technology investors, and is on the Technical Advisory Boards of several recent microelectronics design companies. Alongside this, he has advised on intellectual property issues and acted as an expert witness in litigation.

His most recent interests are as CTO of XMOS (microcomputers), director of Mista (location-based services), and co-founder of the Bristol Robotics Labs (fun!).


Simon Knowles

VP Silicon Engineering Icera

Simon is VP Silicon Engineering and co-founder of Icera Semiconductor, a fabless chip start-up developing cellular modems based on a new processor called DXP, which implements the concepts of Deep Execution. Icera employs about 160 engineers at its development centres in Bristol, Cambridge and Nice. Prior to Icera, Simon co-founded and served as VP Silicon for Element 14, a fabless chip start-up developing DSL modems based on a new processor called FirePath. Element 14 was acquired by Broadcom in late 2000, and FirePath technology now dominates the DSL infrastructure market. Prior to Element 14, Simon led the microprocessor design group of STMicro in Bristol, formerly Inmos. Simon is an '83 Electrical Science graduate of Cambridge University.


Monty Barlow

Group Leader, Wireless DSP Cambridge Consultants Ltd

Monty joined Cambridge Consultants as a student in 1994, initially working on ASICs for sensor and radio applications. For the last four years Monty has been running a signal processing group focussed on wireless applications like software defined radio, cellular standards and ultra-lower power radios. Much of this work has involved parallel processing architectures either from third parties or developed in-house.

Monty graduated from Churchill College Cambridge with an MEng in Electrical and Information Sciences.


Ray McConnell

CTO Clearspeed

Ray is the Chief Technical Officer of ClearSpeed has over 20 years experience in building and delivering parallel processing systems. These have ranged from large multi-board systems (300,000 processors) and smaller desk-side units (400 processors) through to large 70M+ transistor processor SoC designs. Ray also has extensive experience of over 12 years in high-energy startup companies. Having served as a board member in two companies and managed engineering teams of up to 70 engineers. Through this experience, Ray has gone through the process of startup to IPO, and from founder to management buy out.


Nigel Topham

Formerly Chief Architect ARC
Professor of Computer Systems University of Edinburgh

Nigel Topham is Professor of Computer Systems in the School of Informatics at the University of Edinburgh. His research has been in the general areas of computer architecture, micro-architecture, and compiler optimisation techniques. His work has spanned several forms of instruction-level parallelism, including multi-threaded and Very Long Instruction Word (VLIW) architectures. He has also worked on compilation and optimisation techniques for VLIW. In a commercial context he has brought elements of this research to fruition. His current focus is on low-power microprocessors, and micro-architectural synthesis for low power systems. He was recently appointed Director of the Institute for Computing Systems Architecture in the School of Informatics.

Before joining the University of Edinburgh, Nigel Topham was Chief Architect at ARC International, where he was responsible for the development of ultra low-power embedded microprocessors. Prior to that he was Co-founder and Chief Architect at Siroyan Ltd, a semiconductor intellectual property company specialising in high performance embedded processors. He has a BSc and a PhD in Computer Science from Manchester University, which he followed with post-doctoral work at the University of Edinburgh. He has previously held a Readership in Computer Science at the University of Edinburgh, and a visiting position at the Advanced Computer Research Institute.


John Goodacre

Program Manager, Multiprocessing ARM Ltd

John joined ARM in February 2002 taking responsibility for their platform architecture roadmap. More recently he has been responsible for the market development of multiprocessing technology and the release of ARM MPCore. the first integrated SMP core.

Prior to working at ARM, he worked for Microsoft for 5 years, firstly as Group Program Manager in the Exchange Server group and latterly as the manager for its Wireless Telephony group responsible for product, the definitions and strategy of mobile devices.

Graduating from the University of York with a BSc in Computer Science, John has over 20 years experience in the engineering industry.


Presentation Slides

The following slides are available from this seminar.

Warning! These files are big (typically 3MB) so download times may be long over a telephone line.

Speaker Title Adobe PDF
Steve Furber Keynote: Biology Knows Best - Lessons from Nature on Power-Efficient Parallelism Click to download
Gregor Nixon ... Click to download
David May ... Click to download
Simon Knowles ... Click to download
Monty Barlow ... Click to download
Simon McIntoch-Smith ... Click to download
Nigel Topham ... Click to download
John Goodacre ... Click to download